Cadence Design Systems (News - Alert), known for its electronic design innovation, announced that the latest version of the Cadence Virtuoso custom design platform has been deployed by Matsushita Electric Industrial Company.

 

Customers make use of Cadence software and hardware, methodologies, and services for designing and verifying advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems.

 

Matsushita is recognized for its Panasonic (News - Alert) brand and the analog and mixed-signal advanced-node designs of its Semiconductor Company. Matsushita has been successful in using the Virtuoso IC 6.1 for designing and verifying complex and advanced node custom designs which will lead to design time reduction.

 

Cadence and Matsushita came together to make sure that the latest version of the platform satisfies the needs of designers in performing analog/mixed-signal (AMS) design and verification required in complex chips developed nowadays. Cadence technologies also offer Matsushita with design blocks for larger AMS designs. This includes using design constraints so as to make sure that the design intent is maintained during the full development process.

 

The Virtuoso Analog Design Environment and the Virtuoso Layout Suite XL help Matsushita increase productivity. Matsushita uses Virtuoso Layout Migrate for IP reuse and migration.

 

“We have started using the new Virtuoso platform for both our advanced and legacy process nodes,” said Seiji Yamaguchi, System LSI Technology Development Center director, Semiconductor Company of Matsushita.

 

“When we worked with Cadence under this partnership, we set a target to reduce design time by using advanced features of Virtuoso IC 6.1, and we’re starting to see the objective being achieved. Our collaboration with Cadence has provided us with significant new technology to address our greatest custom design challenges,” added Yamaguchi.

 

Cadence collaborated with Matsushita even from the conceptual phase of Virtuoso IC 6.1. The technology allows designers a silicon-accurate way to design custom analog, RF and mixed-signal ICs quite rapidly. The new version has an integrated design environment, modern capabilities for constraint management and technologies for verification and layout.

 

“These results demonstrate the value of our strong relationship with Matsushita,” remarked Srinivas Raman, corporate vice president, Research and Development of Cadence. 

He noted that Cadence collaborated with Matsushita to achieve the substantial design time reduction through close relationship. It is a model of how such cooperative engagements should work. There is an enormous amount of complexity associated with these types of designs, and the Virtuoso IC 6.1 delivers a good technology for tackling these challenges.

 

Integrated products are delivered on a common database for addressing complex design requirements on process nodes. The layout techniques of the platform and DFM technologies offer differentiated custom silicon possible. The Virtuoso platform helps customers increase productivity with better IC design flow, increased design accuracy with lesser re-spins for a high-quality custom silicon which takes lesser time-to-market.